1. Field of the Invention
The present invention relates to a PLL frequency synthesizer, and more particularly to a PLL frequency synthesizer for driving a charge pump using an output from a phase comparator for comparing a phase of a frequency of a generation voltage of a voltage-controlled oscillator with a phase of a reference frequency, and driving the voltage-controlled oscillator using an output from the charge pump, thereby outputting a signal having a set desired frequency.
2. Description of the Prior Art
A generally used PLL frequency synthesizer drives a charge pump using an output from a phase comparator, and drives a VCO using an output from the charge pump. The charge pump can be driven by various methods. The mainstream current drains or absorbs current to or from the charge pump in accordance with an output from the phase comparator.
The charge pump constituted in this manner can easily increase the current value with a simple structure. However, when a voltage at the output terminal of the charge pump comes close to the power supply voltage or ground voltage, the DC bias of an element (generally using an FET) for performing drain/absorption operation upon reception of a signal from the phase comparator greatly changes to disturb the drain/absorption balance.
Japanese Unexamined Patent Publication No. 10-107628 discloses a frequency synthesizer for keeping the natural angular frequency constant by controlling the power supply of a phase comparator.
In the frequency synthesizer disclosed in Japanese Unexamined Patent Publication No. 10-107628, the power supply of the phase comparator is controlled in the above manner. However, the phase comparator itself is integrated into an IC, so it is not practical in consideration of the current popularity of synthesizer ICs to control the power supply of only the phase comparator.